OpenBSD Journal

Initial Support for the riscv64 Architecture

Contributed by rueda on from the now-where's-my-hardware? dept.

With the following commit, Dale Rahn (drahn@) imported initial support for the 64-bit RISC-V architecture:

CVSROOT:	/cvs
Module name:	src
Changes by:	drahn@cvs.openbsd.org	2021/04/22 20:42:17

Added files:
	sys/arch/riscv64: Makefile 
	sys/arch/riscv64/compile: Makefile Makefile.inc 
	sys/arch/riscv64/compile/GENERIC: Makefile 
	sys/arch/riscv64/compile/RAMDISK: Makefile 
	sys/arch/riscv64/conf: GENERIC Makefile.riscv64 RAMDISK 
	                       files.riscv64 kern.ldscript 
	sys/arch/riscv64/dev: mainbus.c mainbus.h plic.c plic.h 
	                      riscv_cpu_intc.c riscv_cpu_intc.h 
	                      simplebus.c simplebusvar.h timer.c timer.h 
	sys/arch/riscv64/include: _float.h _types.h asm.h atomic.h 
	                          bootconfig.h bus.h cdefs.h conf.h 
	                          cpu.h cpufunc.h db_machdep.h 
	                          disklabel.h elf.h endian.h exec.h 
	                          fdt.h fenv.h frame.h ieee.h ieeefp.h 
	                          intr.h kcore.h limits.h 
	                          loadfile_machdep.h mutex.h param.h 
	                          pcb.h pmap.h proc.h profile.h pte.h 
	                          ptrace.h reg.h reloc.h riscv64var.h 
	                          riscvreg.h sbi.h setjmp.h signal.h 
	                          softintr.h spinlock.h syscall.h tcb.h 
	                          timetc.h trap.h vmparam.h 
	sys/arch/riscv64/riscv64: ast.c autoconf.c bus_dma.c bus_space.c 
	                          conf.c copy.S copyinout.S copystr.S 
	                          cpu.c cpufunc_asm.S cpuswitch.S 
	                          db_disasm.c db_interface.c db_trace.c 
	                          disksubr.c fpu.c genassym.cf intr.c 
	                          locore.S locore0.S machdep.c mem.c 
	                          pagezero.S pmap.c process_machdep.c 
	                          sbi.c sig_machdep.c softintr.c 
	                          support.S syscall.c trap.S 
	                          trap_machdep.c vm_machdep.c 

Log message:
Initial import of OpenBSD/riscv64

This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>

With additional work by Dale Rahn <drahn@openbsd.org>

Congratulations and thanks to all involved!


Comments
  1. By Jeff Joshua Rollin (twenex) jeff@jeffjoshua.club on

    Nice.

  2. By Amit Kulkarni (amitkulz) on

    Congratulations and way to go team! With Arm 64, IBM Power 64 bit, and now RISC V, we have 3 new arch's in the last 3 releases.

  3. By grey (grey) on

    Excellent! I have had some RISC-V hardware already but mostly odder FPGA stuff, the HiFive Unmatched I preordered last year has been delayed though may see a May release according to crowdsupply? There's also the BeagleV in the works! In other words, RISC-V hardware is finally coming into a form where having an operating system of merit rather than something more microcontroller aimed is increasingly interesting.

    I don't see https://www.openbsd.org/plat.html updated to reflect RISC-V, but at the moment other than the HiFive Unleashed (which has been long since sold out and difficult to obtain and while it runs Linux, and supposedly FreeBSD good luck getting hardware to port anything else to it) so I suppose it makes sense that there isn't much hardware to announce for running OpenBSD on it yet? Not surprisingly, for the time being https://www.openbsd.org/riscv.html also is a 404.

    I think from what I read elsewhere, preliminary porting efforts were done with an emulated RISC-V environment, so presumably for the time being that is the only thing to which this platform currently applies, though I eagerly await announcements of hardware support, once actual RISC-V hardware previously announced or preordered begins shipping that is. ;)

Credits

Copyright © - Daniel Hartmeier. All rights reserved. Articles and comments are copyright their respective authors, submission implies license to publish on this web site. Contents of the archive prior to as well as images and HTML templates were copied from the fabulous original deadly.org with Jose's and Jim's kind permission. This journal runs as CGI with httpd(8) on OpenBSD, the source code is BSD licensed. undeadly \Un*dead"ly\, a. Not subject to death; immortal. [Obs.]